Interview with John Sanguinetti

Co-founder and chief technical officer of Forte Design Systems, John Sanguinetti talks about his experience of turning an idea into a business. He was the principal architect of VCS, the Verilog Compiled Simulator, and was a major contributor to the Verilog’s resurgence in the design community. He has 15 publications and one patent. He also developed the Verilog Online Training course. He holds a PhD in computer and communication sciences from the University of Michigan, 1977.

Q: Can you talk a little bit about your background?

I worked for several computer manufacturers: DEC, Amdahl, ELXSI, Ardent, NeXT, doing first performance analysis and later design verification. My PhD was in Computer Science (operating system design methodology), not Electrical Engineering. In 1991, I left NeXT and started Chronologic Simulation, the company that made VCS. VCS was the product of several technologies: language compiling, logic simulation, design verification, and performance analysis. We sold Chronologic to Viewlogic in 1994.

Q: What insights did you take away from the sale of Chronologic to Viewlogic?

• Take your time. We got rushed into doing the deal and didn’t take enough time to get to know the acquiring company.
• When a smaller company is acquired by a larger one, expect that the smaller company will lose its identity and disappear. If that’s not what you want, don’t do the deal.
• Corporate culture matters, and it starts at the top.

Q: As a result of the sale you were subject to a non-compete in EDA until 1998. In California non-competes are enforceable when they involve the sale of a business, on the theory that the seller is reducing the goodwill associated with the company being sold. What advice would you have for entrepreneurs contemplating the sale of their company to a larger firm?

A non-compete agreement is perfectly justifiable, but it should not be too long. Mine was four years, and that was about twice as long as it should have been. It should really be up to the acquiring company to make you want to stay, rather than having a legal agreement forcing you to stay, or at least not compete. I was never going to make a product to compete with VCS –– I loved it. However, I would have liked to do other things in EDA after leaving Viewlogic, and I couldn’t do that for several years.

Q: Can you talk a little bit about what led you to found CynApps: what problem or situation motivated you?

Chronologic and VCS was a great learning experience. I learned that there were two big problem areas in EDA––logic verification and logic synthesis. I also knew that the change in level of abstraction from gates to RTL was a great improvement in both design efficiency and verification efficiency, and that was enabled by logic synthesis. I was familiar with behavioral modeling from my verification days, and I was familiar with different levels of abstraction in system design from my graduate school days. It was quite apparent that the industry would undergo another change in level of abstraction, and that would again depend on synthesis.

In 1998 I got together with Andy Goodrich and Randy Allen to start CynApps, the company that is now Forte Design Systems. We set out to first create a higher level design environment rich enough to be usable, and then to create a synthesis product that would produce RTL from higher level designs.

Q: Where is the firm today?

Forte Design Systems is the result of two mergers, first CynApps and DASYS, then CynApps and Chronology. The company is now 11 years old. The original vision of high-level design is unchanged. The high-level design environment morphed from C++/Cynlib to C++/SystemC, which was a change in form, but not function. The Cynthesizer, our synthesis product, has been in customers’ hands for over six years now, and there are quite a few end products –– cameras, TVs, printers, and even cars –– which have chips designed either in part or in whole with SystemC and Cynthesizer.

Q: What are some key lessons you have learned?

I have re-learned the value of focus.

When we started CynApps, we knew there was no point in making a high-level synthesis program if no one was writing high-level code to synthesize. That meant that we had to develop and promote a design environment and also develop and sell the synthesis product. This was beyond the resources of a startup. We didn’t really start making progress on the synthesis product until we switched our input from Cynlib to SystemC, and let other people promote the design environment. If I had it to do over again, I would have gone with SystemC originally and done nothing but work on the Cynthesizer.

Having too much money can be a distraction. There is a real value to being lean –– it forces you to stay focused. The single biggest mistake I made with CynApps/Forte was spending too much money before the product was ready.

Q: How have you changed since you started?

One surprising way I’ve changed is that I have become even more optimistic than I was before. You have to be optimistic to start a company, and I’ve always been a glass half-full kind of person. But I have become even more-so over the years. Chronologic was a success, and Forte is an emerging success. After 11 years, and surviving through two bubbles, I think we can say that Forte has been a success, even though our overall impact on the industry has not reached its peak yet. On a personal level, I’ve had to become much less of a technical contributor than I used to be as I’ve gotten older.

Q: What key skill or experience did you lack when you started that has caused you the most problem?

When I started Chronologic, my biggest lack was understanding the EDA industry. I did not realize the staying power Verilog had as a design language, and this caused me to underestimate the importance of Chronologic and VCS. We could have stayed independent a lot longer, and I would have grown a lot more. When I started CynApps, I had never raised money and run a venture-backed company before. I made several mistakes as a result, trying to do too much, too soon, which cost a lot of money.

Q: What were some things that were “too much, too soon”?

I hired marketing and sales people before we had a product that was generally useful. This was when we were trying to sell the Cynlib/C++ design environment, before the Cynthesizer was finished. They were frustrated, the customers we did have were confused, and we drained our cash. We should have stayed in product development until the synthesizer was ready, let other people promote the C++ design environment, and developed sales resources organically.

Q: How do you tell when a product is ready? Where is money well spent before a product is ready?

I am not sure there is a general answer to when you know the product is ready. At Chronologic, we knew it was ready when it ran a particularly large model from Sun. At Forte, we knew Cynthesizer was ready only after it had actually been used to produce working silicon. While you are in product development, money should only be spent on engineering and market development. Market development basically means go talk to customers, tell them what you are doing, let them tell you if they like it, and repeat. It doesn’t take a lot of resources to do that, but it is very important.

Q: What are the two or three things that you have been able to accomplish that you take the most pride in or satisfaction from?

The success of VCS in the market is by far my most satisfying accomplishment. In a few years, I hope that Cynthesizer will rate up there in the same category. There is nothing like knowing that engineers have used your product to make the products that define our age. There is still something magical about your laptop computer, your camera, your iPhone, and your satellite HDTV and DVR. Knowing that your work made those things possible is really gratifying. When I bought a camera at Fry’s for my daughter, I could tell her that a chip inside was made using Cynthesizer. She didn’t much care, she just thought the face recognition feature was neat, but for me, it was a real kick. I think everyone in the EDA industry feels that way to some degree.

Q: What has been the biggest surprise? What was one key assumption you made, perhaps even unconsciously, that has caused the most grief?

The most surprising thing I learned was how hard a problem high-level synthesis is. There are many more degrees of freedom in synthesis than there are in simulation. If I had known that it would take eight years to get a mature product on the market, I doubt that I would have embarked on the project (and I doubt that I could have raised money to do it).

Q: What development, event, or new understanding since you started has had the most impact on your original plan? How has your plan changed in response?

Surprisingly, Forte’s business plan has changed very little since the founding of CynApps (except the time frame). The only real change we made was in going from Cynlib to SystemC. While we felt that Cynlib was more elegant than SystemC, the value of a standard is undeniable. We should have tried to influence SystemC from within sooner than we did. Andy Goodrich, who was the original author of Cynlib, is now the principal developer of SystemC.

Q: As we start to wrap up I wanted to ask you a personal question if I may. You are a cancer survivor. How has that changed your outlook on life?

Being diagnosed with cancer is a life changing experience for everyone who goes through it. You pretty quickly end up asking yourself what you are doing with your life, and if that is what you really want to be doing. I came to the conclusion that I was doing what I want to be doing –– I like EDA, I like small companies, I like our technology, and I like the people I work with. The only real change I made was to slow down a little and take more time off, but it has been a quantitative change, not a qualitative one.

Q: Any final remarks or suggestions for entrepreneurs?

It’s easy to give advice to first-time entrepreneurs. Lots of people will do it. Some of it is even useful. In a technical field like EDA, understanding the problem, and understanding the technology are prerequisites.

This industry is all about credibility. When you speak, you have to know what you are talking about. To be successful, you have to have credibility, and for that, you have to be a techie at heart. With credibility comes vision. If you know what you know, and understand what you are trying to do and why, then you can successfully resist the forces that will inevitably try to change your course.

Don’t believe the conventional wisdom that your startup needs a “seasoned business professional” to step in and run the company at some point. This is part of the VC formula, and it seldom works in EDA. The guy with the vision, and the credibility, is the guy for the job, and that is you. All the other stuff can be learned on the job.

For more information on John Sanguinetti

• Peggy Aycinena did an amazing interview with John in 2005 that is available in two places.
• Version on EDA Confidential “John Sanguinetti–A Profile“
• Version on EDA Nation “John Sanguinetti–A Profile“
• Peggy Aycinena did another interview in 2007 with John and Scott Sandler, CEO of Novas, “Brown Bag Lunch: Sanguinetti & Sandler“
• The conventional wisdom prior to 1996 was that VHDL would soon eclipse Verilog, which added some urgency to Chronologic’s decision to sell. For some background on the source of much of this wisdom see ESNUG 316 Item 1 from April 8, 1999.

Update June 2: Welcome EE Times Readers. This post was selected as our first EETimes “Trusted Sources” Blog post. If you found this interview useful, we have other interviews with entrepreneurs in our Founder Story posts.